01/03/2000
Jerry Horn

Practical Limits of Analog-to-Digital Conversion

Ever hear the story of the design engineer who wanted a 32-bit analog-to-digital converter (ADC) to go with his 32-bit microcontroller? Or the graduate student who desperately needed a 16-bit, 100 MHz ADC in order to build a prototype of his computer simulated design? For my first column of the new year, I thought I would offer an overview of the practical limits of analog-to-digital conversion. My goal is to provide a starting point for estimating the difficulty in obtaining a given resolution at a desired conversion rate.

Figure 1 shows a rough estimate of the difficulty in obtaining a given digital representation of an analog signal versus conversion rate. Note that the conversion rate roughly corresponds to the bandwidth of the signal. Ideally, the bandwidth of the analog input signal to the analog-to-digital converter (ADC) would be limited to ½ the conversion rate. Unfortunately, real-world systems typically have a bandwidth beyond ½ the conversion rate, so the input bandwidth will not be perfectly limited (for example, internal noise sources will not be perfectly matched to ½ the conversion rate).


Figure 1. Effort Required to Achieve a Given Analog-to-Digital
Performance Level vs. Conversion Rate

In addition, note that the bandwidth of the signal may, theoretically, reside at any frequency -- as long as the width of the frequency band is roughly equivalent to the conversion rate. That is, a one hertz band of frequencies around 0.5 Hz, 1 MHz, or 100 MHz can be digitized with equal resolution. Practical limitations prevent this from being as simple as theory would imply, but keep in mind that the main item of interest is bandwidth, not specific frequencies.

As can be seen from the graph, the Y axis gives ADC resolution in "Effective Number of Bits (ENOB)." This can be thought of as the "average" resolution of the converter. For example, a converter might provide a 16-bit result, but over several conversions of a stable "DC" input, the digital output might jump around by several codes. In practical terms, the converter is providing, on average, a resolution of 14-bits to 15-bits for any single conversion.

As shown in Figure 1, the numbers used to compute ENOB do not take into account any distortion that is added to the analog input signal by the ADC. For example, if the signal-to-noise ratio (SNR) of the ADC is specified, then ENOB is calculated from the equation:

ENOB = (SNR - 1.76)/6.02

The SNR specification must be in dB. For those converters without an SNR specification, the RMS output noise level is used to estimate the signal-to-noise ratio.

ENOB can also be calculated from SINAD which is signal-to-noise plus distortion. This figure can be useful in many applications, particularly frequency domain applications such as software radios and spectrum analysis. However, Figure 1 attempts to present an "apples-to-apples" comparison of a wide variety of converters. Low frequency converters rarely include distortion specifications.

The upper left-hand side of Figure 1 represents an area which should be fairly easy to achieve for most design engineers. As the desired resolution increases and/or the conversion rate increases, the analog-to-digital conversion task becomes increasingly more difficult. At some point, the task is no longer practical.

There are two areas in the graph where "SK" is shown: the lower left-hand side and the upper right-hand corner. SK stands for specialized knowledge. When designing systems that operate near these areas, some specialized knowledge will be required.

For example, when designing low conversion rate systems with high resolution (such as biomedical equipment), the cables must be used between the sensor and the ADC which exhibit low "triboelectric effect." This phenomenon results in noise being added to the signal of interest when the cable is moved or flexed. In some cases, the noise can be much larger than the signal, causing clipping in the gain stages preceding the ADC or limiting the amount of gain that can be applied to the signal.

When designing very high conversion rate systems beyond 100MHz some specialized knowledge is required on how to store the digital data at such a high rate. The designer will also need to know a great deal about high-speed board layout, maintaining signal integrity, connector design, etc.

The shaded area market "difficult" in Figure 1 represents the performance of many typical discrete ADCs which are offered by the mainstream mixed-signal manufacturers. The area in the upper left-hand corner of the graph is generally accomplished by ADCs integrated with digital ICs such as microcontrollers or low-cost, high-volume application specific ICs which may combine analog, mixed-signal, and extensive digital circuitry. The area in the lower right-hand corner represents an area that is either impossible for all practical purposes or is only possible for low volume applications where cost is a low priority.

The "difficult" area of Figure 1 changes over time, moving slowly down and to the right. As with digital ICs, mixed-signal ICs follow a trend similar to Moore's Law. Eric Swanson of Cirrus Logic is said to have offered a similar law for mixed-signal ICs which says that their dynamic range increases by about 2 dB per year or about 1 bit every three years. That sounds about right.

This brings up an oddity regarding the graph shown in Figure 1. The graph is based on personal experience with ADCs and by compiling the ENOB for a large number of ADCs from different manufacturers. Theory would indicate that the slope of the shaded areas of the graph should be lower than shown. The graph shows a slope of  2 bits per decade. However, an analysis based purely on noise bandwidth would indicate a slope closer to 1.7 bits per decade.

The discrepancy may be due to the different markets for the converters which means that the graph is still not exactly "apples-to-apples." High-speed converters tend to have a wider bandwidth than lower-speed converters because these converters are used for undersampling applications. On the other hand, delta-sigma audio converters have a very definitive bandwidth which is set by the digital filter and which is generally about ½ the conversion rate. As a side note, delta-sigma converters tend to be closer to (and sometimes slightly into) the area marked "difficult to impossible." Also, very high-resolution converters (the extreme left-hand side of the graph) often have input bandwidths that are only a small portion of their conversion rate; since the market for these converters is primarily focused on measuring "DC" voltages.

For general system design, it's best to stay away from the area marked "difficult to impossible." However, there are many compelling products which would require ADCs that are within this area. These include software radios and high-speed Internet connections.

A number of manufacturers are currently focusing their efforts on ADCs for these markets. As usual, look for improved dynamic range and higher conversion rate in the near future as well as highly integrated products combining a number of high-performance analog and mixed-signal components. These products will be attempting to push performance into areas that are currently not possible and will be lowering the cost of entry into those areas that are currently very costly and difficult.

On the other hand, don't believe marketing claims of "24-bit, 96kHz" audio ADCs. These converters are 18-bits to 19-bits at best. Still, these are very respectable numbers which were not possible even just a few years ago.

Somewhere in the future, audio converters may indeed approach 24-bit performance. Swanson's Law would imply that this could occur in about 20 years. This leads to the question: "But isn't there an ultimate limit?"

There is indeed a fundamental noise floor set by thermal noise and other noise sources. For noise sources which are random, there are techniques which could theoretically overcome these. Such techniques would require a different approach to ADC design than is currently utilized, but that's nothing new.

To borrow from an old saying: If you don't like the ADCs that are being offered now, wait a while…they'll change.

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