EBN
(10/18/1999)

A/D & D/A Converters:
Converter Makers Chase Emerging Communications Technologies
The race is more challenging with increasing demands for higher-performance, lower-cost devices.

By John H. Mayer

The data-converter market is no stranger to competition. Manufacturers have historically raced each other to push the speed and resolution of their parts to higher levels. But new, rapidly developing technologies in communications are raising the stakes once again and adding more twists as OEMs seek data-converter products that set new levels of performance and help them meet shrinking power budgets.

The emergence of multicarrier base stations for cellular applications is creating challenges and opportunities for converter makers. Traditional cellular base-station architectures use a complete receive-and-transmit chain for each RF carrier they process.

"There's one antenna, but there are multiple receive chains, and each has amplifiers, filters, and mixers, and usually two or three mix stages down to a baseband signal that's then digitized and goes into a DSP for the final modulation," said Kurt Rentel, marketing manager for base-station products at National Semiconductor Corp., Santa Clara, Calif.

To reduce space, power consumption, and, most importantly, system cost, base-station designers are turning to multicarrier radio designs that eliminate much of the redundancy of traditional narrowband designs and replace the multiple receive chains with a single high-performance radio in which each RF carrier is processed in the digital domain.

"You take those same channels and bring them all into one A/D converter, and the channelization--rather than being done by a bunch of narrowband filters and different tuning frequencies--is all taken care of digitally," Rentel said.

By eliminating multiple analog circuits, the multicarrier approach promises to dramatically reduce base-station cost. System designers already claim that multicarrier technology can reduce the per-channel cost of a base station by at least a factor of four.

But just as important, by digitizing those functions and making them programmable, the base station becomes much more flexible and opens the door to the possibility of building a single base station capable of supporting different air-interface standards.

"Ideally, we'd like to have one piece of hardware that we can program to accommodate any air-interface standard there is," said Joe DiPilato, marketing manager for the high-speed converter group at Analog Devices Inc., Norwood, Mass.

Although the concept of a software radio is not new, developers have been held up by limitations in data converters--the weak link in building multimode, multicarrier base stations across all standards, DiPilato said.

The problem comes down to dynamic range.

"In a multicarrier system, you capture the whole band, digitize it, and then all your filtering and channel selection is done digitally," DiPilato said. "When you do that, you need a lot of dynamic range because you're collecting all the signals, and if you have one signal right next to another and one is high-powered and the other is very low-powered, the high-powered signal will swamp the dynamic range of the converter."

Applications such as GSM1800, PCS, Wideband CDMA, and Wireless Local Loop (WLL) demand a dynamic range approaching 100 dBc. But the most challenging air-interface standard is the 900-MHz GSM band.

"When they designed the GSM standard, no one envisioned doing multicarrier designs, so they defined some pretty rigorous testing for single-carrier radio design," said David Duff, product manager at Analog Devices. "They can have a near-far phenomenon--the difference between something that's close to the antenna and something that's far away that the base station may have to support--of greater than 110 dB. To have a truly compliant base station for that market, you'd have to hit that spec."

So far, no converter manufacturer has been able to reach that level of performance. In the past year, however, vendors have made enough progress to support multicarrier designs for GSM1800, PCS, Wideband CDMA, and WLL applications.

One of the first A/D converters to meet this requirement was National Semiconductor's CLC5958. The monolithic 14-bit device operates at 52 Msamples/s and features a 90-dB spurious-free dynamic range (SFDR) and a signal-to-noise ratio of 70 dB at 20 MHz. The CLC5958 enables designers to replace up to four single-channel receiver chains using lower-dynamic-range A/Ds with a single multicarrier receiver chain. The CLC5958 integrates a low-distortion track-and-hold amplifier and a 14-bit multistage quantizer in a 48-pin chip-scale package. Featuring differential analog inputs, low-jitter differential clock inputs, an internal bandgap voltage reference, and CMOS/TTL-compatible outputs, the chip is priced at $35 in 1,000s.

For similar applications, Analog Devices recently announced the AD6644, a 14-bit, 80-Msample/s A/D converter. A key component in Analog's SoftCell chipset for multicarrier designs, the part provides up to 100 dB of dynamic range and a 77-dB signal-to-noise ratio. Low-jitter sampling allows the part to digitize IF frequencies up to 200 MHz of analog input.

Other companies are active in this arena. One of the first 14-bit, 65-Msample/s ADCs to reach the market comes from Burr-Brown Corp., Tucson, Ariz. Introduced last year, the ADS852 is a CMOS device with a spurious-free dynamic range of 100 dB and a signal-to-noise ratio of 75 dB.

Transmit travails

On the transmit side, the challenges presented by multicarrier base-station designs, as well as rapidly growing wireless applications for WLL and I and Q modems, are just as daunting. Suppliers are trying to meet the requirements with a new generation of D/A converters (DACs) that offer excellent dynamic range while supporting speeds up to 125 Msamples/s.

"Traditionally, you'd generate your transmit signals on a single-channel basis where you generate one signal through a single D/A converter and then go through the up-conversion process and go out through the antenna," said Juan Garcia, product marketing engineer at Intersil Corp., Palm Bay, Fla. "Designers of these new systems are trying to generate multiple signals and then process them through the same DAC. The transmission protocols remain the same. It just means you have to have higher and higher levels of performance on your D/A converter."

For applications like these, Intersil announced production last month of its CommLink Family of DACs. The devices feature a dynamic range of 86 dBc at 100 Msamples/s, support speeds up to 125 Msamples/s, and deliver more than 70 dBc of dynamic range while generating eight carriers (6 to 10 MHz at 64 Msamples/s).

The company is offering a 12-bit (HI5860) and 14-bit (HI5960) single device as well as a 12-bit dual part (HI5828). The dual converter is targeted at designers who want to conserve board space and optimize channel matching without sacrificing performance.

"In an analog baseband-type of architecture, you always want to match gain and offset between I and Q as much as possible because any imbalance is going to result in distortion in your signal," Garcia noted. "By having both D/As in the same package, you can reduce the amount of offset or imbalance between the two channels just by the simple fact that they're on the same piece of silicon."

For the multicarrier base-station transmit chain, Analog Devices introduced earlier this year the AD9772, a single-supply, oversampling 14-bit, 300-Msample/s DAC. The CMOS device integrates a complete DAC with a 2X digital interpolation filter and clock multiplier. The on-chip clock multiplier provides all the necessary clocks for the digital filter and the 14-bit DAC. With 23 interpolation filters, the part achieves greater than 75-dB SFDR performance over a 25-MHz bandwidth.

More integration

Increasing pressure to shrink system footprint, power consumption, and cost is driving manufacturers' ongoing efforts to roll more functionality directly into the data converter.

Texas Instruments Inc., for example, has recently introduced a family of data-converter ICs optimized for use with the company's DSPs. The THS1206 eliminates some of the bottlenecks that slow data transfer between the ADC and the DSP by adding a 16-word FIFO (first-in, first-out) memory on-chip. "The intention for the FIFO is to reduce the interrupts of the DSP to allow it to do its intended tasks more efficiently," explained Russell Jordan, strategic marketing manager for data converters at TI, Dallas. The on-chip FIFO reportedly boosts data-transfer rates by a factor of six. By distributing the process-interrupt latency over each sample in the FIFO, the THS1206 is able to bundle a large amount of data together before interrupting and subsequently transferring the data to the DSP. A built-in address decoder allows two devices to be directly connected to a TI TMS320 DSP without requiring external logic.

The 12-bit, 6-Msample/s ADC also features four sample-and-hold amplifiers, which are multiplexed into a single 12-bit ADC. Differential nonlinearity for the chip is ±1 least significant bit (LSB) maximum, and integral nonlinearity is ±1.5 LSB maximum. The signal-to-noise ratio is 68 dB with a 2-MHz input.

A case for discretes

The benefits of higher integration are not limited to the communications arena. Earlier this year, Cirrus Logic Inc., Fremont, Calif., mounted all the functions needed to design a complete industrial data-acquisition system on a single chip. wo new 16-bit ADCs, the CS5521 and CD5523, combine a low-drift, chopper-stabilized amplifier, a multichannel multiplexer, and a charge-pump drive with a programmable gain stage.

In some embedded applications, however, rising performance requirements are motivating designers to take a step back from a more integrated approach. For example, microcontroller maker Microchip Technology Inc. has offered embedded data converters on its PICmicro family of 8-bit devices for many years. In August, however, the company announced its first discrete A/D converters.

"There are certain things you just can't do as well when you have to design the data converter into a microcontroller," said Paul Pickering, product marketing manager for analog ICs at Microchip, Chandler, Ariz. "The electrical noise is much worse when you have to design it into a microcontroller, and there are certain process limitations when you're designing-in a purely digital process. So, if you look at what most guys are doing out there with 8-bit micros, you won't see a lot of high-resolution A/D converters on the same die as the micro core."

The new discrete parts offer three times the sample rate of an embedded alternative, according to Pickering.
Microchip's MCP320X family of 12-bit devices features 100-Ksample/s throughput, a wide supply voltage of 2.7 to 5.5 V, and power consumption of only 400 µA active and 500 nA standby. Available in 1-, 2-, 4-, and 8-input-channel versions, the MCP320X family is specified at ±1 LSB DNL and ±1 LSB INL maximum at 100 Ksamples/s. Pricing ranges from $2.58 to $3.12 in quantities of 1,000.

Giving customers a choice to go embedded or discrete was one motivation for the new offerings. But just as important is the widely acknowledged shortage of experienced analog engineers.

"A lot of companies are now expecting their digital engineers to do a lot of their analog-component selection, especially for those parts that go right around the microcontroller," Pickering said. "Many aren't going to feel too comfortable with a lot of the specifications they have to deal with, and some of the analog-component suppliers in the market assume a fairly high level of technical sophistication on the part of their customer base."

By offering extensive development-tool support and tight compatibility with its microcontroller line, Microchip hopes to take some of the pain out of the process of purchasing discrete A/D converters.

Size and power considerations are key not only in communications applications but in virtually all others. Devices such as the 12-bit SPT7937 ADC from Signal Processing Technologies Inc., Colorado Springs, Colo., dissipate only 170 mW, yet are capable of minimum sample rates of 28 Msamples/s off a single 5-V power supply. A wide bandwidth of 250 MHz supports direct-IF down-conversion applications.

Similarly, Exar Corp., Fremont, Calif., brought to market earlier this year a family of 8- and 10-bit ADCs targeted at low-power applications. For applications as diverse as I and Q modems and digital cameras, these CMOS devices support a range of 6 to 68 Msamples/s at 3 or 5 V. The 8-bit XRD6202, 10-bit XRD64L40, and 10-bit XRD64L06 dissipate 215, 76.5, and 42 mW, respectively.

Broadband challenge

The next challenge for data-converter designers on the communications front is the emergence of wireless systems that promise broadband access to the home or office. Systems like LMDS will require new, very high-speed converters.

Analog Devices is working on a converter family that will support data interfaces up to 300 MHz. "The first family of products will have multiplexed data inputs on the DAC side, so they will clock in data at 150 MHz at each port, and then internally we do high-speed clock multiplication and multiplexing to get the data to the device at the 2X rate," DiPilato said. Samples are available for 10-, 12-, and 14-bit devices.

For extremely high-speed digital communications, Maxim Integrated Products, Sunnyvale, Calif., recently added to its product line the MAX108, an 8-bit monolithic, bipolar ADC with a 1.5-Gsample/s digitizing rate. Designed to enable direct IF sampling in broadband, high-rate receivers employing PSK or QAM modulation, the device achieves a typical 47-dB SINAD and 54-dB SFDR at 750-MHz input frequency.

John H. Mayer is a freelance writer based in Belmont, Mass.

Copyright © 2000 CMP Media, Inc.