With digital control and signal processing in vogue, designers continue to push performance levels of applications ranging from wireless communications to data acquisition. To comply with emerging standards or new requirements, they're implementing data converters with higher resolution, faster clock rates, lower power consumption, and smaller footprints. The trend is to minimize the tradeoffs between these parameters, while maximizing device frequency-domain (ac) and static (dc) characteristics.

Despite all of this progress, there is no single converter for all applications. Each market presents its own set of problems and challenges. And, suppliers continue to polish their wares to serve myriad applications with varying needs. Consequently, selecting an optimal solution is no longer trivial. It requires a good understanding of data-converter specifications, and of the converter's impact on system performance.

Like their front-end cousins, analog-to-digital converters (ADCs), back-end digital-to-analog converters (DACs), continue to evolve to meet such demands. Besides architectural refinements and clever circuit techniques, new-generation single-chip DACs also are exploiting advances in CMOS and biCMOS processes to pack more functions, peripherals, and interfaces on-chip. As power and size are becoming key issues in many designs, the latest DAC ICs are migrating toward lower voltages and tinier packages. In short, they're emerging as integrated solutions, requiring minimal external components to solve the end problems.

Communications DACs

Responding to the needs of burgeoning digital-wireless and wireline telecommunications markets, vendors such as Analog Devices, Burr-Brown, Harris Semiconductor, and Texas Instruments are tailoring new-generation DACs. These will enable system architects to move to the next level in dynamic response, as sampling rates go higher and settling times get faster. Needless to say, single 5- and 3-V supply voltages are gaining momentum to keep power consumption to a bare minimum. Thanks to deep-submicron CMOS technology, these single-chip solutions are seeing a further drop in supply voltages as they race to become compatible with high-density digital circuits. In addition, finer-process geometries are allowing manufacturers to produce these mixed-signal devices in miniaturized surface-mountable packages, to address component density and cost challenges of upcoming systems.

These requirements have pushed Analog Devices (ADI) to deliver a next-generation, transmit-path CMOS TxDAC family with dramatic improvements in output drive, noise immunity, and linearity. These 14-bit DACs have update rates of 125 Msamples/s. Spurious-free-dynamic-range (SFDR) and intermodulation-distortion (IMD) specifications were enhanced to improve the noise floor and lower distortion.

Communications-system designers will look for these two key parameters in high-performance DACs. This will ensure that the transmitter doesn't send spurious signals into neighboring frequency bands that traverse through a common cable or air interface. This becomes even more critical in wideband systems, where the DAC must produce several two-tone or multitone signals at its output. In wideband cellular basestations, several channels are simultaneously produced at the DAC output to reduce system cost. Likewise, ADSL modems, which utilize discrete, multitone-based modulation schemes, demand good multitone performance.

Designers wanted to eliminate amplitude-dependent distortion associated with R-2R ladder architectures, and obtain superior ac and dc performance. So, a segmented current-source architecture was used in the CMOS TxDAC devices, according to Joe DiPilato, marketing manager, Analog Devices' high-speed converter group. "In addition, to achieve further improvement in SFDR performance, proprietary latch and switching circuitry has been utilized," he says. The TxDAC has true differential current outputs to support differential and single-ended applications.

Five models in the first-generation AD976x series give designers a price/performance tradeoff during the evaluation stage. TxDAC members are pin-compatible from 8 to 14 bits in resolution. Thus, they have the flexibility to trade off bit-error rate (BER) for system cost, explains Steve LaJeunesse, marketing engineer for transmit DACs. "Differing wireless and wireline applications use different modulation schemes, accommodate different data rates, and require differing system-level performance. This choice permits a designer to optimize the margin of error for a given standard or specifications," he notes.

The company now is offering second-generation TxDACs, the AD975x series with a greater than 6-dB advantage in SFDR and noise floor over first-generation parts (Fig. 1). The new-generation TxDAC series offers improved dc linearity and output drive capability. By comparison, there is ±1-LSB improvement in integral nonlinearity (INL) and differential nonlinearity (DNL) for the newer TxDACs. For instance, typical INL and DNL for the older, 14-bit AD9764 are ±2.5 LSB and ±1.5 LSB, respectively. INL and DNL ratings for the new AD9754 are ±1.0 LSB. Likewise, SFDR to Nyquist at 5 MHz output is rated at 83 dBc. The two-tone IMD, at 125 Msamples/s and 10.0 and 10.25 MHz output, is -79 dBc.

Other members of the AD975x family have undergone similar improvements. To improve ac and dc performance with the same drive capability as earlier-generation parts, the AD975x's output drive was modified. Additionally, the analog portion of the new series has been designed to operate at 5 V only. The converter's internal control amplifier permits full-scale output current to be adjusted over a range of 2 to 20 mA.

"In summary, the new-generation AD975x family is tailored for optimum dynamic performance at higher frequencies," states Steve Reine, applications engineer for Analog Devices' converter group. The AD975x comes in 28-pin SOICs and TSSOPs. But Reine cautions that to tap maximum performance from the AD975x family, the high-frequency clock must be highly stable, with very low jitter and noise.

"High-speed, high-performance DACs have been the bottleneck in the transmit path of digital communication systems," says Patrick Kirk, Burr-Brown's marketing manager. By combining a segmented current-source architecture with clever circuits and advanced CMOS, suppliers have developed higher-resolution DACs that meet SFDR and IMD requirements for wide-band communications. "Using such high-performance DACs, systems designers can obtain the error margin needed for IMD and SNR," Kirk adds.

Burr-Brown has unveiled a new family of 10-, 12-, and 14-bit DACs. While the DAC900 is a 10-bit, 125-Msample/s converter for the transmit channel, the 12-bit DAC902 and 14-bit DAC904 provide an upgrade path. Implemented in 0.6-µm CMOS, the models come with an integrated 1.24-V bandgap reference and edge-triggered input latches. With only one external resistor, full-scale output current can be adjusted over 2 to 20 mA, according to Burr-Brown's data sheets for DAC900 members. All the new units come in pin-compatible, 28-lead SOIC and SSOP packages.

Harris also favors a segmented current-source architecture and advanced 0.5-µm CMOS for this high-growth market. Like others using this combination, it has prepared high-speed 12- and 14-bit monolithic DAC solutions. These have a minimum update rate of 125 Msamples/s, and a high dynamic range of 80 dB. They also offer 75 dB in multitone power ratio. "These high-speed DACs are enabling higher frequencies at the analog output, thereby minimizing the upconverter stages needed in the transmit chain, and reducing the overall cost of the communications system," explains Juan Garcia, Harris Semiconductor's product marketing engineer for basestation communications. "Their ability to generate multitone signals and maintain high dynamic performance further makes them attractive for wideband communications," he adds. Currently, Harris is sampling both the 12-bit HI5860 and the 14-bit HI5960, with production plans for the middle of the next quarter. Both come in 28-pin SOIC packages, and provide an upgrade path for faster lower-resolution DACs. Designed for single 3- or 5-V supplies, these units provide adjustable output currents ranging from 2 to 20 mA.

Soon, Texas Instruments (TI) will enter this fray. While TI has been a major supplier of commodity DACs, it's now expanding into the high-performance arena with faster, higher-resolution DACs with high-output impedance and drive capability. TI believes that its leading-edge, deep-submicron analog CMOS process will provide the distinction needed in this competitive market. Plus, it will guarantee the frequency-domain specifications at 3 V, as well as 5 V, says Tony Chang, senior systems engineer for data converter products at TI.

To enable the direct launch to a higher IF, TI has set its sights on update rates up to 400 Msamples/s for its upcoming 10- and 12-bit DACs. Other highlights include the addition of a PLL to ease clocking, and an improved interpolation filter that occupies much less die space. Tom Lahutsky, TI's new product development manager for dataconverters, calls them, "DSP-friendly DACs for communications." According to TI, such DACs are expected to be launched later in the year.

Many wireless basestations and ADSL/HFC modem applications require a complex analog-reconstruction filter at the output of higher-resolution DACs to suppress any unwanted images. To simplify such analog filtering, Analog Devices has integrated a 4X-interpolation filter with a 14-bit high-speed DAC on the same chip to realize the AD9774. This single-supply, oversampling, 14-bit DAC is optimized for waveform reconstruction, having a bandwidth as high as 13.5 MHz at an input data rate of 32 Msamples/s. Also, its SFDR performance at 5 MHz is 77 dBc. By multiplying the input data rate by a factor of four, a 4X-interpolation filter helps in suppressing in-band images by more than 69 dB. First- and second-generation TxDAC members are implemented in 0.6-µm CMOS. Still, efforts are under way to extend this performance to the next level, which will use 0.35-µm CMOS. Stay tuned for more details on the third generation of TxDAC.

Meanwhile, the trend to pack two or more high-performance DACs on the same die also is gaining popularity. Dual DACs are finding use, especially in quadrature-based modulation schemes that perform an analog mix of the I and Q signals. Here, the interleaved I and Q digital data stream is de-interleaved back into its original I and Q signals by the two-channel high-speed DAC. For this application, Analog Devices has readied the AD9761, a dual 10-bit TxDAC with 2X-interpolation filter and digital interface circuitry on-board. Each channel supports an input data rate of 20 Msamples/s, which is then interpolated by the 2* filter to 40 Msamples/s before simultaneously updating each DAC. A dual-DAC version without an interpolation filter is also in the works. According to Analog Devices, it's planned for release in the spring.

The demand for two-channel DACs has prompted Harris to extend that capability to higher-resolution converters. Last year, the company announced the dual-channel, 10-bit, 125-Msample/s HI5728 for wireless local-loop and multilevel QAM systems. This year, Harris is developing a dual-channel, 12-bit DAC for processing I and Q signals. The 12-bit HI5828 is intended for sampling in the second quarter, with production slated for this summer. Unlike single-channel models, however, the dual-channel solutions come in 48-lead TQFPs. "Crosstalk is a critical issue in higher-resolution two-channel DACs," states Glenn D. Oliver, product marketing manager at Harris. Minimizing crosstalk, then, requires isolation of the two matched DACs on the same die. Using proprietary techniques, Harris has attained 80-dB channel isolation.

Similar products are in development at Burr-Brown and TI. Both firms are contemplating dual-channel DACs for later in the year. Concurrently, Burr-Brown is investigating the incorporation of interpolation filters in its DAC. The interpolation DACs are expected to be unwrapped in the third quarter.

Video And Imaging

While communications systems are seeking improved frequency-domain response from high-speed, high-resolution DACs, video and imaging applications are pushing linearity and settling time. Since the human eye's dynamic range is limited, 8- and 10-bit solutions are currently addressing the needs in this market. Some 12-bit DACs are finding homes in these sockets, but their accuracy is only 10 bits. In fact, the emergence of HDTV, and the convergence of PC and TV, are opening opportunities for high-speed DACs. With update rates of 80 Msamples/s and higher, and settling times of 12 ns or better, DAC makers are optimizing 8- and 10-bit DACs with glitch energy of 1 nV-s.

Furthermore, differential gain and phase errors are being minimized to minimize color shifts. "Of all 18 defined formats, even the true HDTV format of 1080 lines interlaced and 720 lines progressive requires a pixel rate of 74.25 MHz. So, an 80-Msample/s DAC is sufficient to convert the ATSC (Advanced Television Systems Committee) decoded signal into analog video," states Bart DeCanne, senior systems engineer for dataconverter products at TI. TI hopes to gain a foothold in this market. Before year's end, it intends to roll 8- and 10-bit fast-settling DACs, with a worst-case INL rating of ±1 LSB and a DNL specification below 1 LSB.

Meanwhile, Analog Devices and Philips Semiconductors are readying multichannel digital-video DACs with high levels of integration to support simultaneously various output configurations. In fact, Philips is converting its biCMOS encoders to CMOS to bring the benefits of system-level solutions to this market.

Industrial DACs

Price erosions have enabled industrial process control and test-and-measurement system designers to move upward on the resolution scale. Obviously, these systems now are migrating to 16-bit and higher DACs with faster settling time, lower drift, and maximum linearity error of ±1 LSB or better. Space constraints also have forced suppliers to pack them in miniaturized surface-mountable packages.

Toward that end, Burr-Brown has tapped its expertise in delta-sigma technology and combined it with switched-capacitor and continuous-time filters on chip to achieve inherent 20-bit performance with 2.5-mW power dissipation (Fig. 2). The result is the 20-bit DAC1220 in an ultra-small, 16-lead SSOP.

While positioning- and calibration-type instrumentation applications are seeking higher resolution and linearity, many closed-loop servo-control designs are content with 16-bit accuracy. As a result, the DAC1220 offers two modes of operation. The resolution of the device can be programmed to 20 bits for full-scale settling to within 0.003% in 15 ms, or 16 bits for full-scale settling to within 0.012% in 2 ms. On-chip calibration circuitry also provides extremely low offset and gain error. A 3-V DAC1221 version is also in the works.

At the 16-bit level, many designers are looking for multichannel solutions from a single package. In addition to ATE and industrial process control, where several DACs are required simultaneously, the multichannel approach also is desired in data-acquisition systems. Besides eliminating separate tweaking, the well-matched DACs on the same die simplify external circuitry and cut power consumption significantly. A good example is Burr-Brown'sDAC7644/7744. These quad 16-bit DACs permit unipolar or bipolar operations. They also include a high-speed output amplifier. This settles in 10 µs to within 0.003% for a full-scale step input, and consumes only 10 mW from a single 5-V supply. While the DAC7644 is designed to operate from 5 or ±5.0 V, the DAC7744 is a +15- or ±15-V version. Both come in 48-lead SSOPs.

Other companies striving to advance the resolution and settling time of industrial DACs are Analog Devices (ADI), Linear Technology (LTC), Maxim Integrated Products, and Sipex.

According to LTC, its LTC1597 is a true 16-bit part that guarantees INL and DNL linearity to within 1 LSB over the industrial temperature range in both 2- and 4-quadrant multiplying modes. "Settling time is a key feature in this market," notes Willie Rempfer, LTC's manager of data converter products. "However, the faster DACs consume more power," he adds. "The user must strike a balance between the settling time required and the maximum power consumption tolerated." While the LTC1597 is a multiplying, current-output, 16-bit DAC, LTC also offers a voltage-output version that includes an output on-board op amp.

Providing a voltage output is a trend that will continue, as DAC makers try to increase the number of channels from a single package. In the 14-bit arena, Analog Devices has readied the AD7841, an octal, 14-bit, parallel-input, voltage-output DAC. It's also in the process of releasing 32/64-channel 14-bit DACs in one 119-lead BGA package for level setting in ATE applications. The AD5532/64 include a droopless output, infinite output-hold capability, and 0.012% transfer-function nonlinearity between the input and the output. Efforts are under way at Analog Devices to produce a quad 16-bit DAC with serial and parallel interfaces in microminiature packages, like the µSOIC and MSOP.

Similarly, LTC is pursuing the multichannel route to produce dual, quad, and octal 14- and 16-bit DACs in single packages. By cutting short the interconnect lines, the multichannel solution ensures that the signals are clean to maintain accuracy and stability over the specified temperature range.

Audio DACs

Higher resolution, wider dynamic range, and faster update rates are the norm in the consumer and professional digital-audio world. This niche is being served by 24-bit resolution with over 100 dB of dynamic range and 96-kHz sample rates. Emerging DVD audio and other high-end applications are further driving 24-bit DACs to 192-kHz sampling, with a 120-dB dynamic range as a goal.

Major players like Analog Devices, AKM Semiconductor, Burr-Brown, Cirrus Logic, and Wolfson Microelectronics, are behind this effort (see the table). These suppliers of high-performance audio-DAC chips are combining single and multibit delta-sigma architectures with fine-line CMOS to deliver DACs in smaller packages that run on lower voltages.

Analog Devices, for example, continues to tap 6-bit - modulator and segmented noise-shaped scrambling techniques to achieve a 113-dB dynamic range over a 20-kHz bandwidth, while supporting sample rates up to 192 kHz. Using this approach in 0.6-µm CMOS, the company has developed the AD1853. With on-chip digital interpolation filters and a flexible serial-input port, this stereo, 24-bit, 192-kHz solution allows glueless interfacing to a variety of ADCs and DSP chips.

Cirrus Logic's Crystal Division also is focused on getting a 120-dB dynamic range at 192-kHz sample rates with the CS4396 as the answer for DVD audiophiles. Crystal intends to sample it by mid-summer and take it to production by fall, says marketing manager, Fred Valenzuela. "To go beyond a 130-dB dynamic range, we've opted for a multibit approach," says Valenzuela. "Multichannel versions are also in the works."

Likewise, AKM Semiconductor and Wolfson Microelectronics are providing an upgrade path for their users. Both are developing 24-bit, 192-kHz sample-rate versions for release by this summer. "Implementing 192-kHz sample-rate ICs means lot of memory on the digital side," cautions AKM marketing manager George Hill. "So, look at the marketing roadmap before jumping into the 192-kHz specifications."

"The multibit delta-sigma approach results in less noise in the audio band, as well as out of band," states Burr-Brown's audio product marketing manager, Mike Centorino. "It also reduces jitter sensitivity." For better results, he recommends using a high-performance op amp at the output of these audio DACs. Burr-Brown has incorporated high-definition-compatible digital (HDCD) decoding and digital filtering on the same die to produce the PCM1732. This DAC is capable of accepting 16/20/24-bit input data, and samples at up to 96 kHz.